About Us

ASIC Verification Training Course Content

Digital Design Fundamentals

• Basic Fundamentals (Number System, Boolean Algebra, Logic Gates, Logic Optimizations).
• Combinational Logic Design.
• Sequential Logic Circuits & Finite State Machines

Verilog For Design

• Concept & Fundamentals
• Structural Modeling
• Behavioral Modeling
• Building Behavioral Models

Verilog For Verification

• Verilog Operators & Directives
• Verilog Testbench Constructs
• Built-in System Functions & Tasks
• File I/O Operations
• Randomization & Control Functions

Verification Architecture

• Verification Flow and Simulation Process
• Types of Testbench – Architecture and Applications
• Testbench Building Blocks
• Verification Architecture

Scripting & Automation

• Shell scripts & Linux commands
• Perl Scripts
• Makefile

Writing Testbench : Verilog (Hands-on Lab)

• Testbench Architecture
• Testbench Building blocks
• Step-by-step Guidelines

Final Project

• Build Verification IP for one or more the standard based interface like I2C, SPI, AHB and UART.